CrateSum Design Schematics

  • Sheet 1: Top-level Diagram
  • Sheet 2: VME Interface
  • Sheet 3: P1 Connections
  • Sheet 4: P0 Connections
  • Sheet 5: P2 Connections
  • Sheet 6: Control Block
  • Sheet 7: Test Connector 1
  • Sheet 8: Test Connector 2
  • Sheet 9: Controller Chip
  • Sheet 10: P3 Connections
  • Sheet 11: P3 Latch
  • Sheet 12: Sum Chip
  • Sheet 13: DAQ Block
  • Sheet 14: Bunch Counter
  • Sheet 15: ET Sum DAQ
  • Sheet 16: Trig Sum DAQ
  • Sheet 17: ET Raw DAQ
  • Sheet 18: Trig Raw DAQ
  • Sheet 19: Front Panel
  • Sheet 20: Power

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    This page is maintained by Nancy J. Lai. Email me at nlai@cdf.uchicago.edu if you have any questions or comments.