ADC Module - Current Test of the VCCINT=1.2V, FPGA Core Power Supply




This Note describes the testing of the FPGA Core Supply for the 14-BIT 125MSPS ADC Module, loaded with Data Compression Firmware ADC_125mhz_rev2071.sof.

 

1. The 1.2V VCCINT core FPGA voltage is provided by the circuit shown below.

This is a fixed 1.2V/3Amax supply. The red mark indicates a 0.3Ohm resistor, inserted for current measurement.

 

2. The Core Current with Data Compression disabled is shown below.

Channel 2 shows the incoming L1A pulse, Channels 1 and 3 show the voltage on both ends of the test resistor.

The Math Measurement of Ch1 - Ch3 corresponds to a VCCINT Current of 1.46A.

With data compression inactive, the FPGA core current has a small temporary increase, corresponding to FPGA internal data processing which follows a L1A pulse.


4. The Instantaneous VCCINT and +1.2V_PLL Voltages with Data Compression disabled are shown below.

Channel 2 shows the incoming L1A pulse, Channel 1 shows VCCINT, and Channel 3 shows +1.2V_PLL.

These voltage drops are causing no noticeable problems in FPGA functionality.

 

4. The Core Current with Data Compression enabled is shown below.

Channel 2 shows the incoming L1A pulse, Channels 1 and 3 show the voltage on both ends of the test resistor.

The Math Measurement of Ch1 - Ch3 corresponds to a VCCINT RMS Current of 1.463A.

With data compression active, the FPGA core current has a temporary increase of over 2.3A corresponding to FPGA internal data processing which follows a L1A pulse.

 


5. The Instantaneous VCCINT and +1.2V_PLL Voltages with Data Compression enabled is shown below.

Channel 2 shows the incoming L1A pulse, Channel 1 shows VCCINT, and Channel 3 shows +1.2V_PLL.

 

6. The Instantaneous VCCINT and +1.2V_PLL Voltages with Data Compression enabled and C26 and C27 changed from 10uF to 470uF is shown below. In this configuration, the F1_2V fuse was bypassed by a 18 AWG wire.

Channel 2 shows the incoming L1A pulse, Channel 1 shows VCCINT, and Channel 3 shows +1.2V_PLL.


 



 
For questions regarding this page contact Mircea Bogdan.
bogdan@edg.uchicago.edu
Revised: Oct. 12, 2015