Rear Transition Card with VME Access Capabilities
Schematics
- 2743_Sheet_1.pdf : Top Level
- 2743_Sheet_2.pdf : VME Interface
- 2743_Sheet_3.pdf : RP2 Connector
- 2743_Sheet_4.pdf : Data Output
- 2743_Sheet_5.pdf : Rx FPGA
- 2743_Sheet_6.pdf : RP0 Connector
- 2743_Sheet_7.pdf : RP3 Buffers
- 2743_Sheet_8.pdf : Tx FPGA
- 2743_Sheet_9.pdf : RP3 Connector
- 2743_Sheet_10.pdf : Data Input
- 2743_Sheet_11.pdf : Power Block - general
- 2743_Sheet_12rx.pdf, 2743_Sheet_12tx.pdf : Power Blocks for the FPGAs.
For questions regarding this page contact
Mircea Bogdan.
bogdan@edg.uchicago.edu
Revised: August 2011