TITLE "Control Chip"; INCLUDE "E:\users\dirac\control\10xbuffer"; SUBDESIGN CONTROL ( A[23..2] : INPUT; %VME address bus% /P2_RESET : INPUT; %Trigger manager RESET* signal% /P2_ERR : OUTPUT; %Trigger manager ERR* signal% /P2_HALT : INPUT; %Trigger manager HALT* signal% /MODSEL : INPUT; %VME MODSEL* signal from VME 2000 chip(module select)% /DS : INPUT; %VME DS* signal from VME 2000 chip(data strobe)% /WRITE : INPUT; %VME WRITE signal% L1BA[1..0] : INPUT; %L1 address from the Trigger Manager% TAP[9..0] : INPUT; %Various length delay taps for return of /ACK signal and gating most signals.% /ERROR : INPUT; %The ERROR chip error signal% FTOW_EN : OUTPUT; %FTOW drivers enable CONTROL(0)% TRACK_SRC : OUTPUT; %Tracking receivers enable CONTROL(1)% /TRIN_REG_OC : OUTPUT; %OC* for the TrackIn Register CONTROL(2)% /MLU_TRACK_EN : OUTPUT; %CE* & OE* for Tracking MLUs CONTROL(4)% TR_DIAG_REG_CLK : OUTPUT; %CLK for the Tracking Diag. Register CONTROL(5)% /TR_DIAG_REG_OC : OUTPUT; %OC* for the Tracking Diag. Register CONTROL(6)% /TR_ADDR_BUFF : OUTPUT; %G* for the Tracking Address buffers CONTROL(7)% /TR_LOOP_DATA_BUFF : OUTPUT; %G* for the buffer to read TrackIn Register CONTROL(8)% /TR_DATA_BUFF : OUTPUT; %OE* for the data buffers to TT MLUs CONTROL(9)% /MLU_TRACK_WE : OUTPUT; %WE* for the Tracking MLUs CONTROL(10)% /TRANS_DIR : OUTPUT; %DIR* for the tranceivers on DRAW CONTROL(11)% % NOTE: There are 6 Towers. Each tower has one EM and one HAD tower. Therefore, most control signals are in 3 or 6. The VME tower clocks are in groups of 3 since we can write to 2 towers at once(10bits/tower with 32 data bits avail. on VME). The masking bits are in groups of 6. One bit for each EM and HAD Tower.% TOW_EM_CLK[2..0] : OUTPUT; %CLK for writing VME data to EM Towers CONTROL(12-14)% TOW_HAD_CLK[2..0] : OUTPUT; %CLK for writing VME data to HAD Towers CONTROL(15-17)% TOW_HAD_EM_SEL : OUTPUT; %Selector Bit for which bits to use in HAD/EM CONTROL(18)% % NOTE: The HAD/EM bits are either the 3 least significant bits of the HAD tower energy or the next to 3 least sig. bits(2:0 or 3:1).% TOW_EM_MASK[5..0] : OUTPUT; %Masking Bits for the EM Towers CONTROL(19-24)% TOW_HAD_MASK[5..0] : OUTPUT; %Masking Bits for the HAD Towers CONTROL(25-30)% TOW_VME_SEL[2..0] : OUTPUT; %Select Bits for Data Access to the Towers CONTROL(31-32,121)% /TOW_ENA : OUTPUT; %Enable* Towers for Real Data CONTROL(33)% % NOTE: If you are in run mode you are not allowed to write to the data path through VME. When TOW_ENA is turned on, the TOWLAT chip blocks all VME CLK signals. You are allowed to read data from the TOWLAT chip.% TOW_READ_SEL[2..0] : OUTPUT; %Enable for which Tower to read data CONTROL(34-36)% TOW_ENER_GRAN : OUTPUT; %Bit to set the Energy Granularity CONTROL(38)% % NOTE: Energy Granularity is either the least significant 8 bits or the middle 8 bits of the 10 bit Tower Energy.% /AL_FIFO_OE : OUTPUT; %OE* for the Alignment FIFOs CONTROL(41)% /FIFO_RESET : OUTPUT; %MR* for all FIFOs CONTROL(42)% /MLU_ADDR_TT[2..0] : OUTPUT; %G* for Address buffers for TT SRAMs CONTROL(57-59)% /MLU_TT_WE[2..0] : OUTPUT; %WE* for TT SRAMs CONTROL(60-62)% /MLU_TT_OE : OUTPUT; %CE* and OE* for TT SRAMs CONTROL(63)% /MLU_DATA_TT[2..0] : OUTPUT; %OE* for Data Xceivers for TT SRAMs CONTROL(64-66)% L2_READ_ADDR[1..0] : OUTPUT; %L2 buffer to read on a DAQ readout CONTROL(84-85)% L2_WRITE_ADDR[1..0] : OUTPUT; %L2 buffer to fill on a L1 Accept CONTROL(86-87)% /DAQ_READ_EN[2..0] : OUTPUT; %GR* for reading the L2 DAQ buffers CONTROL(88-90)% /CSUM_OE : OUTPUT; %OE* for the CSUM Data CONTROL(92)% /CSUM_DATA_OE : OUTPUT; %OE* for the CSUM Data Xceivers CONTROL(94)% CMUX_REG_CLK : OUTPUT; %CLK for writing VME data to CSUM_MUX CONTROL(95)% CMUX_VME_CLK : OUTPUT; %CLK for writing to Control Regs of CSUM_MUX CONTROL(96)% /CMUX_DATA_READ : OUTPUT; %G* for reading data from CMUX latches CONTROL(97)% /CSUM_BP_OE : OUTPUT; %OE* for CSUM buffers on the backplane CONTROL(98)% ET_THRESH[1..0] : OUTPUT; %ETSUM Threshold CONTROL(100-101)% /ETSUM_OE : OUTPUT; %OE* for the output of ETSUM(ETOUT chip) CONTROL(102)% /ETSUM_VME_G : OUTPUT; %G* for VME data buffers to ETSUM output CONTROL(103)% /ETSUM_BP_OC : OUTPUT; %OC* for Buffer driving backplane for ETSUM CONTROL(104)% /BUNCH_READ_EN : OUTPUT; %GR* for reading the Bunch Counter L2 buffers CONTROL(106)% BUNCH_VME_STROBE : OUTPUT; %Strobe to write offset data to Bunch Counter CONTROL(108)% ERROR_ADDR[1..0] : OUTPUT; %Address to select which Towers to Mask CONTROL(110-111)% ERROR_VME_CLK : OUTPUT; %CLK to write in masking data to ERROR chip CONTROL(112)% /FIFO_REN : OUTPUT; %REN* for all FIFOs CONTROL(113)% /FIFO_WEN : OUTPUT; %WEN* for all FIFOs CONTROL(114)% % NOTE: The REN* and WEN* need to change state only during reseting of the FIFOs.% /ERROR_WRITE : OUTPUT; %WRITE* signal for ERROR chip CONTROL(115)% AUX_CTRL[2..0] : OUTPUT; %Feed through the BP for AUX Control CONTROL(119-120,122)% HEART_WRITE : OUTPUT; %Signal to tell heart to put the data on HEART_CTRL into its internal registers.% /HEART_READ : OUTPUT; %Signal to tell heart to put the data in its internal registers onto the HEART_CTRL bus.% /HEART_RESET : OUTPUT; %Signal to reset HEART.% HEART_STEP : OUTPUT; %Signal to tell HEART to strobe the appropriate component based on the state of the HEART_CTRL bus.% /HEART_L1A : OUTPUT; %Fake L1 ACCEPT sent to the HEART to strobe the L2 buffers.% HEART_RUN_HALT : OUTPUT; %Whether the HEART should be sending out signals or waiting on instructions from CONTROL chip.% HEART_CLK_SRC : OUTPUT; %Source of the global CLK signal for HEART to use: either VME SYSCLK or the CDFCLK from the P2 backplane.% /VME_ERROR : OUTPUT; %VME ERR* signal% /ACK : OUTPUT; %ACK* signal to be returned to the VME 2000 chip...must be longer than slowest VME transaction.% LIGHT[2..0] : OUTPUT; %Bus that controls the state of 3 Front Panel LEDs% HEART_CTRL[9..0] : BIDIR; %The primary data bus between the HEART and CONTROL chips: 3 Modes: 1) Store the Delays and tap data TOWER_DEL[2..0] = HEART_CTRL[2..0] TOWER_TAP[1..0] = HEART_CTRL[4..3] TRACK_DEL[2..0] = HEART_CTRL[7..5] TRACK_TAP[1..0] = HEART_CTRL[9..8] Only if HEART_WRITE on a positive transition 2) Send back the same data that it can store with the same correspondence in bits. Only if /HEART_READ is high. 3) Control which component is to be strobed. HEART[0] = TOWER_IN HEART[1] = ALFIFO_IN HEART[2] = EtSum_IN HEART[3] = EtSum_OUT HEART[4] = ALFIFO_OUT HEART[5] = TRACK_IN HEART[6] = L1FIFO_IN HEART[7] = CSUM_IN HEART[8] = L1FIFO_OUT HEART[9] = L2_BUFF_IN Only on a positive transition of HEART_STEP.% D[9..0] : BIDIR; %VME data bus% ) VARIABLE ADD_FLAG[54..0] : LCELL; %TR_DIAG = ADD_FLAG[0] -- Tracking Diagnostics Register TRIN_REG = ADD_FLAG[1] -- Tracking Input Register VME_LOOP = ADD_FLAG[2] -- Tracking Load Address/TrackIn Data Loop TR = ADD_FLAG[3] -- Tracking MLUs TOWEM[2..0] = ADD_FLAG[6..4] -- TOWLAT EM Registers(writable Memory) TOWHAD[2..0] = ADD_FLAG[9..7] -- TOWLAT HAD Registers(writable Memory) TOWL2EM_R[2..0]= ADD_FLAG[12..10] -- TOWLAT L2 EM Registers(readable Memory) TOWL2HAD_R[2..0]= ADD_FLAG[15..13] -- TOWLAT L2 HAD Registers(readable Memory) TOWTOT_R[2..0] = ADD_FLAG[18..16] -- TOWLAT TOWTOT+LSBHAD Registers(readable Memory) TOWEM_R[2..0] = ADD_FLAG[21..19] -- TOWLAT TOWEM Registers(readable Memory) MLU_TT[2..0] = ADD_FLAG[24..22] -- T&T MLUs L1_FIFO[2..0] = ADD_FLAG[27..25] -- L1 FIFOs(all towers are strobed but only 2 will have valid data) DAQ[2..0] = ADD_FLAG[30..28] -- DAQ Buffers (Divided by tower access not by buffer address(CDF L2BA))(0-1)(2-3)(4-5) CSUM = ADD_FLAG[31] -- CSUM CSUM_MUX[1..0] = ADD_FLAG[33..32] -- CSUM_MUX Registers ETSUM = ADD_FLAG[34] -- ETSUM BUNCH_REG = ADD_FLAG[35] -- Bunch Counter offset Register BUNCH_DAQ = ADD_FLAG[36] -- Address for reading the bunch counter L2 Buff Bunch DAQ is no longer used....should use the BOARD_ID space instead(ADD_FLAG47) ERROR[3..0] = ADD_FLAG[40..37] -- Error Chip registers INT_CTRL[6..0] = ADD_FLAG[47..41] -- Internal registers and access to HEART CTRLZERO,CTRLONE,STRB,DELAYS,MASKEM,MASKHAD,BOARD_ID ID = ADD_FLAG[48] -- ID PROM data-code plus serial number AL_FIFO[2..0] = ADD_FLAG[51..49] -- Align FIFO (no strobe of FIFO, through SRAM) AL_STR[2..0] = ADD_FLAG[54..52] -- Align FIFO (with strobe of FIFO, through SRAM)% WRITEPRIME : DFF; %Need to register WRITE because it can change faster than DS% ACK_FF : DFFE; %Registered ACK* signal, cant be registered output% %since the output must be negated% OUT_DATA[9..0] : LCELL; %Defined to clean some of the logic up a bit% OUT_HEART[9..0] : NODE; %So I Don't give multiple values to an OUTPUT pin% ZERO,FOUR,EIGHT,CEE,10EE,14EE,18EE : NODE; %Internal nodes to simplify the Address decoding% ZERO_6_19,ZERO_12_19,ZERO_8_19 : NODE; %Internal nodes to simplify the Address decoding% ZERO_4_19,ZERO_10_19 : NODE; ZERO_13_19,ZERO_14_19 : LCELL; %Internal nodes to simplify the Address decoding% ZERO_16_19 : LCELL; CTRLZERO[9..0],CTRLONE[9..0] : DFFE; STRB[8..0] : DFFE; MASKEM[5..0],MASKHAD[5..0] : DFFE; BUFFZERO,BUFFONE : 10xbuffer; %Readout buffers(10) for the internal data bus% ALFIFO : LCELL; %Space saver for ALFIFO selection% L1FIFO : LCELL; %Space saver for L1FIFO selection% IDPROM0[7..0] : NODE; %IDPROM WORD (Only 1 word though, repeated)% IDPROM1[7..0] : NODE; %IDPROM WORD (Only 1 word though, repeated)% IDPROM2[7..0] : NODE; %IDPROM WORD (Only 1 word though, repeated)% IDPROM3[7..0] : NODE; %IDPROM WORD (Only 1 word though, repeated)% IDPROM4[7..0] : NODE; %IDPROM WORD (Only 1 word though, repeated)% IDPROM5[7..0] : NODE; %IDPROM WORD (Only 1 word though, repeated)% IDPROM6[7..0] : NODE; %IDPROM WORD (Only 1 word though, repeated)% IDPROM7[7..0] : NODE; %IDPROM WORD (Only 1 word though, repeated)% IDPROM8[7..0] : NODE; %IDPROM WORD (Only 1 word though, repeated)% IDPROM9[7..0] : NODE; %IDPROM WORD (Only 1 word though, repeated)% IDPROMA[7..0] : NODE; %IDPROM WORD (Only 1 word though, repeated)% IDPROMB[7..0] : NODE; %IDPROM WORD (Only 1 word though, repeated)% IDPROMC[7..0] : NODE; %IDPROM WORD (Only 1 word though, repeated)% IDPROMD[7..0] : NODE; %IDPROM WORD (Only 1 word though, repeated)% IDPROME[7..0] : NODE; %IDPROM WORD (Only 1 word though, repeated)% BEGIN DEFAULTS CTRLZERO[] = B"0000111000"; CTRLONE[] = B"0000001100"; MASKEM[] = B"000000"; MASKHAD[] = B"000000"; STRB[] = B"000000000"; ADD_FLAG[] = H"00000000000000"; ACK_FF = 1; END DEFAULTS; %Register the WRITE signal% WRITEPRIME = /WRITE; WRITEPRIME.clk = !/MODSEL; %Address Decoding Time% ZERO_16_19 = !(A19 # A18 # A17 # A16); ZERO_14_19 = !(A14 # A15 # !ZERO_16_19); ZERO_13_19 = !(A13 # !ZERO_14_19); ZERO_12_19 = !(A12 # !ZERO_13_19); ZERO_10_19 = !(A10 # A11 # !ZERO_12_19); ZERO_8_19 = !(A8 # A9 # !ZERO_10_19); ZERO_6_19 = !(A6 # A7 # !ZERO_8_19); ZERO_4_19 = !(A4 # A5 # !ZERO_6_19); ZERO = !( A2 # A3 # !ZERO_4_19); FOUR = !(!A2 # A3 # !ZERO_4_19); EIGHT = !( A2 # !A3 # !ZERO_4_19); CEE = !(!A2 # !A3 # !ZERO_4_19); 10EE = !( A2 # A3 # !A4 # !ZERO_6_19 # A5); 14EE = !( !A2 # A3 # !A4 # !ZERO_6_19 # A5); 18EE = !( A2 # !A3 # !A4 # !ZERO_6_19 # A5); IF ((A[23..20] == B"0000") & !/MODSEL) THEN IF ZERO THEN ADD_FLAG[] = H"00020000000000"; ELSIF FOUR THEN ADD_FLAG[] = H"00040000000000"; ELSIF (EIGHT & WRITEPRIME) THEN ADD_FLAG[] = H"00080000000000"; ELSIF CEE THEN ADD_FLAG[] = H"00100000000000"; ELSIF (ZERO_6_19 & !A5 & A4 & !A3 & !A2) THEN ADD_FLAG[] = H"00200000000000"; ELSIF (ZERO_6_19 & !A5 & A4 & !A3 & A2) THEN ADD_FLAG[] = H"00400000000000"; END IF; ELSIF ((A[23..20] == B"0001") & !/MODSEL & ZERO_8_19 & !A7 & !WRITEPRIME) THEN ADD_FLAG[] = H"01000000000000"; ELSIF ((A[23..20] == B"0010") & !/MODSEL & WRITEPRIME) THEN IF (ZERO_6_19 & !A5 & !A4 & !A3) THEN ADD_FLAG[] = H"00000000000010"; ELSIF (ZERO_6_19 & !A5 & !A4 & A3) THEN ADD_FLAG[] = H"00000000000020"; ELSIF (ZERO_6_19 & !A5 & A4 & !A3) THEN ADD_FLAG[] = H"00000000000040"; ELSIF (ZERO_6_19 & A5 & !A4 & !A3) THEN ADD_FLAG[] = H"00000000000080"; ELSIF (ZERO_6_19 & A5 & !A4 & A3) THEN ADD_FLAG[] = H"00000000000100"; ELSIF (ZERO_6_19 & A5 & A4 & !A3) THEN ADD_FLAG[] = H"00000000000200"; ELSIF (ZERO_13_19 & A12 & !A11 & !A10) THEN ADD_FLAG[] = H"00000002000000"; ELSIF (ZERO_14_19 & A13 & !A12 & !A11 & !A10) THEN ADD_FLAG[] = H"00000004000000"; ELSIF (ZERO_14_19 & A13 & A12 & !A11 & !A10) THEN ADD_FLAG[] = H"00000008000000"; END IF; ELSIF ((A[23..20] == B"0010") & !/MODSEL & !WRITEPRIME) THEN IF (ZERO_8_19 & !A7 & !A6 & !A5 & !A4 & !A3) THEN ADD_FLAG[] = H"00000000000400"; ELSIF (ZERO_8_19 & !A7 & !A6 & !A5 & !A4 & A3) THEN ADD_FLAG[] = H"00000000000800"; ELSIF (ZERO_8_19 & !A7 & !A6 & !A5 & A4 & !A3) THEN ADD_FLAG[] = H"00000000001000"; ELSIF (ZERO_8_19 & !A7 & !A6 & A5 & !A4 & !A3) THEN ADD_FLAG[] = H"00000000002000"; ELSIF (ZERO_8_19 & !A7 & !A6 & A5 & !A4 & A3) THEN ADD_FLAG[] = H"00000000004000"; ELSIF (ZERO_8_19 & !A7 & !A6 & A5 & A4 & !A3) THEN ADD_FLAG[] = H"00000000008000"; ELSIF (ZERO_8_19 & !A7 & A6 & A5 & !A4 & !A3) THEN ADD_FLAG[] = H"00000000010000"; ELSIF (ZERO_8_19 & !A7 & A6 & A5 & !A4 & A3) THEN ADD_FLAG[] = H"00000000020000"; ELSIF (ZERO_8_19 & !A7 & A6 & A5 & A4 & !A3) THEN ADD_FLAG[] = H"00000000040000"; ELSIF (ZERO_8_19 & !A7 & A6 & !A5 & !A4 & !A3) THEN ADD_FLAG[] = H"00000000080000"; ELSIF (ZERO_8_19 & !A7 & A6 & !A5 & !A4 & A3) THEN ADD_FLAG[] = H"00000000100000"; ELSIF (ZERO_8_19 & !A7 & A6 & !A5 & A4 & !A3) THEN ADD_FLAG[] = H"00000000200000"; ELSIF (!A15 & A14 & !A13 & !A12 & !A11 & !A10) THEN ADD_FLAG[] = H"02000000000000"; ELSIF (!A15 & A14 & !A13 & A12 & !A11 & !A10) THEN ADD_FLAG[] = H"04000000000000"; ELSIF (!A15 & A14 & A13 & !A12 & !A11 & !A10) THEN ADD_FLAG[] = H"08000000000000"; ELSIF (!A15 & A14 & A13 & A12 & !A11 & !A10) THEN ADD_FLAG[] = H"10000000000000"; ELSIF ( A15 & !A14 & !A13 & !A12 & !A11 & !A10) THEN ADD_FLAG[] = H"20000000000000"; ELSIF ( A15 & !A14 & !A13 & A12 & !A11 & !A10) THEN ADD_FLAG[] = H"40000000000000"; END IF; ELSIF ((A[23..20] == B"0011") & !/MODSEL) THEN IF (ZERO_10_19) THEN ADD_FLAG[] = H"00000000000008"; ELSIF (ZERO_12_19 & !A11 & A10 & !WRITEPRIME) THEN ADD_FLAG[] = H"00000000000004"; END IF; ELSIF ((A[23..20] == B"0100") & !/MODSEL) THEN ADD_FLAG[] = H"00000000400000"; ELSIF ((A[23..20] == B"0101") & !/MODSEL) THEN ADD_FLAG[] = H"00000000800000"; ELSIF ((A[23..20] == B"0110") & !/MODSEL) THEN ADD_FLAG[] = H"00000001000000"; ELSIF ((A[23..20] == B"0111") & !/MODSEL) THEN IF (ZERO & WRITEPRIME) THEN ADD_FLAG[] = H"00000000000001"; ELSIF (EIGHT & WRITEPRIME) THEN ADD_FLAG[] = H"00000100000000"; ELSIF (ZERO_6_19 & A5 & !A4 & !A3 & !A2 & WRITEPRIME) THEN ADD_FLAG[] = H"00000800000000"; ELSIF (ZERO & !WRITEPRIME) THEN ADD_FLAG[] = H"00000000000002"; ELSIF (CEE & !WRITEPRIME) THEN ADD_FLAG[] = H"00000200000000"; ELSIF FOUR THEN ADD_FLAG[] = H"00000080000000"; ELSIF (ZERO_6_19 & !A5 & A4 & !A3 & !A2) THEN ADD_FLAG[] = H"00000400000000"; ELSIF (ZERO_6_19 & A5 & A4 & !A3 & !A2) THEN ADD_FLAG[] = H"00002000000000"; ELSIF (ZERO_6_19 & A5 & A4 & !A3 & A2) THEN ADD_FLAG[] = H"00004000000000"; ELSIF (ZERO_6_19 & A5 & A4 & A3 & !A2) THEN ADD_FLAG[] = H"00008000000000"; ELSIF (ZERO_6_19 & A5 & A4 & A3 & A2) THEN ADD_FLAG[] = H"00010000000000"; END IF; ELSIF ( A23 & !A22 & ZERO & !/MODSEL & !WRITEPRIME) THEN ADD_FLAG[] = H"00800000000000"; ELSIF ( A23 & !A22 & FOUR & !/MODSEL & !WRITEPRIME) THEN ADD_FLAG[] = H"00000010000000"; ELSIF ( A23 & !A22 & EIGHT & !/MODSEL & !WRITEPRIME) THEN ADD_FLAG[] = H"00000020000000"; ELSIF ( A23 & !A22 & CEE & !/MODSEL & !WRITEPRIME) THEN ADD_FLAG[] = H"00000040000000"; END IF; %Input data bus fanout to registers% %IDProm values are in hex% IDPROM0[] = H"30"; %This is 0 in ASCII% IDPROM1[] = H"30"; %This is 0 in ASCII% IDPROM2[] = H"58";%This is X in ASCII% IDPROM3[] = H"58"; %This is X in ASCII% IDPROM4[] = H"20"; %This is spacebar in ASCII% IDPROM5[] = H"30"; %This is 0 in ASCII% IDPROM6[] = H"30"; %This is 0 in ASCII% IDPROM7[] = H"35"; %This is 5 in ASCII% IDPROM8[] = H"20"; %This is spacebar in ASCII% IDPROM9[] = H"44"; %This is D in ASCII% IDPROMA[] = H"49"; %This is I in ASCII% IDPROMB[] = H"52"; %This is R in ASCII% IDPROMC[] = H"41"; %This is A in ASCII% IDPROMD[] = H"43"; %This is C in ASCII% IDPROME[] = H"20"; %This is spacebar in ASCII% CTRLZERO[] = D[9..0]; CTRLONE[] = D[9..0]; MASKEM[] = D[5..0]; MASKHAD[] = D[5..0]; ALFIFO = ADD_FLAG52 # ADD_FLAG53 # ADD_FLAG54; L1FIFO = ADD_FLAG25 # ADD_FLAG26 # ADD_FLAG27; STRB[8..7] = !ALFIFO & !L1FIFO & !ADD_FLAG34 & D[8..7]; STRB6 = L1FIFO # (!ALFIFO & !ADD_FLAG34 & D6); STRB5 = !ALFIFO & !L1FIFO & !ADD_FLAG34 & D5; STRB4 = ALFIFO # (!L1FIFO & !ADD_FLAG34 & D4); STRB3 = ADD_FLAG34 # (!ALFIFO & !L1FIFO & D3); STRB[2..0] = !ALFIFO & !L1FIFO & !ADD_FLAG34 & D[2..0]; %Decoder for both HEART_CTRL and D output% OUT_HEART[8..0] = ((ADD_FLAG43 # L1FIFO # ALFIFO # ADD_FLAG34) & STRB[8..0]) # (ADD_FLAG44 & D[8..0]); OUT_HEART[9] = ADD_FLAG44 & D[9]; OUT_DATA[0] = LCELL(ADD_FLAG44 & HEART_CTRL[0]) # (ADD_FLAG45 & MASKEM[0]) # (ADD_FLAG46 & MASKHAD[0]) ; OUT_DATA[1] = LCELL((ADD_FLAG41 & CTRLZERO[1]) # (ADD_FLAG42 & CTRLONE[1]) # (ADD_FLAG44 & HEART_CTRL[1]) # (ADD_FLAG45 & MASKEM[1]) # (ADD_FLAG46 & MASKHAD[1]) ); OUT_DATA[2] = LCELL((ADD_FLAG41 & CTRLZERO[2]) # (ADD_FLAG42 & CTRLONE[2]) # (ADD_FLAG44 & HEART_CTRL[2]) # (ADD_FLAG45 & MASKEM[2]) # (ADD_FLAG46 & MASKHAD[2]) # (ADD_FLAG48 & ZERO & IDPROM0[0]) # (ADD_FLAG48 & FOUR & IDPROM1[0]) # (ADD_FLAG48 & EIGHT & IDPROM2[0]) # (ADD_FLAG48 & CEE & IDPROM3[0]) # (ADD_FLAG48 & 10EE & IDPROM4[0])# (ADD_FLAG48 & 14EE & IDPROM5[0]) # (ADD_FLAG48 & 18EE & IDPROM6[0]) # (ADD_FLAG48 & !( !A2 # !A3 # !A4 # A5 # !ZERO_6_19) & IDPROM7[0]) # (ADD_FLAG48 & !( A2 # A3 # A4 # !A5 # !ZERO_6_19) & IDPROM8[0])# (ADD_FLAG48 & !( !A2 # A3 # A4 # !A5# !ZERO_6_19) & IDPROM9[0]) # (ADD_FLAG48 & !( A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMA[0]) # (ADD_FLAG48 & !( !A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMB[0]) # (ADD_FLAG48 & !( A2 # A3 # !A4 # !A5 # !ZERO_6_19) & IDPROMC[0]) # (ADD_FLAG48 & !( !A2 # A3 # !A4 # !A5# !ZERO_6_19) & IDPROMD[0]) # (ADD_FLAG48 & !( A2 # !A3 # !A4 # !A5 # !ZERO_6_19) & IDPROME[0]) ); OUT_DATA[3] = LCELL((ADD_FLAG41 & CTRLZERO[3]) # (ADD_FLAG42 & CTRLONE[3]) # (ADD_FLAG44 & HEART_CTRL[3]) # (ADD_FLAG45 & MASKEM[3]) # (ADD_FLAG46 & MASKHAD[3]) # (ADD_FLAG48 & ZERO & IDPROM0[1]) # (ADD_FLAG48 & FOUR & IDPROM1[1]) # (ADD_FLAG48 & EIGHT & IDPROM2[1]) # (ADD_FLAG48 & CEE & IDPROM3[1]) # (ADD_FLAG48 & 10EE & IDPROM4[1]) # (ADD_FLAG48 & 14EE & IDPROM5[1]) # (ADD_FLAG48 & 18EE & IDPROM6[1]) # (ADD_FLAG48 & !( !A2 # !A3 # !A4 # A5 # !ZERO_6_19) & IDPROM7[1]) # (ADD_FLAG48 & !( A2 # A3 # A4 # !A5 # !ZERO_6_19) & IDPROM8[1])# (ADD_FLAG48 & !( !A2 # A3 # A4 # !A5# !ZERO_6_19) & IDPROM9[1]) # (ADD_FLAG48 & !( A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMA[1]) # (ADD_FLAG48 & !( !A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMB[1]) # (ADD_FLAG48 & !( A2 # A3 # !A4 # !A5 # !ZERO_6_19) & IDPROMC[1]) # (ADD_FLAG48 & !( !A2 # A3 # !A4 # !A5# !ZERO_6_19) & IDPROMD[1]) # (ADD_FLAG48 & !( A2 # !A3 # !A4 # !A5 # !ZERO_6_19) & IDPROME[1]) ); OUT_DATA[4] = LCELL((ADD_FLAG41 & CTRLZERO[4]) # (ADD_FLAG42 & CTRLONE[4]) # (ADD_FLAG44 & HEART_CTRL[4]) # (ADD_FLAG45 & MASKEM[4]) # (ADD_FLAG46 & MASKHAD[4]) # (ADD_FLAG48 & ZERO & IDPROM0[2]) # (ADD_FLAG48 & FOUR & IDPROM1[2]) # (ADD_FLAG48 & EIGHT & IDPROM2[2]) # (ADD_FLAG48 & CEE & IDPROM3[2]) # (ADD_FLAG48 & 10EE & IDPROM4[2]) # (ADD_FLAG48 & 14EE & IDPROM5[2]) # (ADD_FLAG48 & 18EE & IDPROM6[2]) # (ADD_FLAG48 & !( !A2 # !A3 # !A4 # A5 # !ZERO_6_19) & IDPROM7[2]) # (ADD_FLAG48 & !( A2 # A3 # A4 # !A5 # !ZERO_6_19) & IDPROM8[2])# (ADD_FLAG48 & !( !A2 # A3 # A4 # !A5# !ZERO_6_19) & IDPROM9[2]) # (ADD_FLAG48 & !( A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMA[2]) # (ADD_FLAG48 & !( !A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMB[2]) # (ADD_FLAG48 & !( A2 # A3 # !A4 # !A5 # !ZERO_6_19) & IDPROMC[2]) # (ADD_FLAG48 & !( !A2 # A3 # !A4 # !A5# !ZERO_6_19) & IDPROMD[2]) # (ADD_FLAG48 & !( A2 # !A3 # !A4 # !A5 # !ZERO_6_19) & IDPROME[2]) ); OUT_DATA[5] = LCELL((ADD_FLAG41 & CTRLZERO[5]) # (ADD_FLAG42 & CTRLONE[5]) # (ADD_FLAG44 & HEART_CTRL[5]) # (ADD_FLAG45 & MASKEM[5]) # (ADD_FLAG46 & MASKHAD[5]) # (ADD_FLAG48 & ZERO & IDPROM0[3]) # (ADD_FLAG48 & FOUR & IDPROM1[3]) # (ADD_FLAG48 & EIGHT & IDPROM2[3]) # (ADD_FLAG48 & CEE & IDPROM3[3]) # (ADD_FLAG48 & 10EE & IDPROM4[3]) # (ADD_FLAG48 & 14EE & IDPROM5[3]) # (ADD_FLAG48 & 18EE & IDPROM6[3]) # (ADD_FLAG48 & !( !A2 # !A3 # !A4 # A5 # !ZERO_6_19) & IDPROM7[3]) # (ADD_FLAG48 & !( A2 # A3 # A4 # !A5 # !ZERO_6_19) & IDPROM8[3]) # (ADD_FLAG48 & !( !A2 # A3 # A4 # !A5# !ZERO_6_19) & IDPROM9[3]) # (ADD_FLAG48 & !( A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMA[3]) # (ADD_FLAG48 & !( !A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMB[3]) # (ADD_FLAG48 & !( A2 # A3 # !A4 # !A5 # !ZERO_6_19) & IDPROMC[3]) # (ADD_FLAG48 & !( !A2 # A3 # !A4 # !A5# !ZERO_6_19) & IDPROMD[3]) # (ADD_FLAG48 & !( A2 # !A3 # !A4 # !A5 # !ZERO_6_19) & IDPROME[3]) ); OUT_DATA[6] = LCELL((ADD_FLAG41 & CTRLZERO[6]) # (ADD_FLAG42 & CTRLONE[6]) # (ADD_FLAG44 & HEART_CTRL[6]) # (ADD_FLAG48 & ZERO & IDPROM0[4]) # (ADD_FLAG48 & FOUR & IDPROM1[4]) # (ADD_FLAG48 & EIGHT & IDPROM2[4]) # (ADD_FLAG48 & CEE & IDPROM3[4]) # (ADD_FLAG48 & 10EE & IDPROM4[4]) # (ADD_FLAG48 & 14EE & IDPROM5[4]) # (ADD_FLAG48 & 18EE & IDPROM6[4]) # (ADD_FLAG48 & !( !A2 # !A3 # !A4 # A5 # !ZERO_6_19) & IDPROM7[4]) # (ADD_FLAG48 & !( A2 # A3 # A4 # !A5 # !ZERO_6_19) & IDPROM8[4]) # (ADD_FLAG48 & !( !A2 # A3 # A4 # !A5# !ZERO_6_19) & IDPROM9[4]) # (ADD_FLAG48 & !( A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMA[4]) # (ADD_FLAG48 & !( !A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMB[4]) # (ADD_FLAG48 & !( A2 # A3 # !A4 # !A5 # !ZERO_6_19) & IDPROMC[4]) # (ADD_FLAG48 & !( !A2 # A3 # !A4 # !A5# !ZERO_6_19) & IDPROMD[4]) # (ADD_FLAG48 & !( A2 # !A3 # !A4 # !A5 # !ZERO_6_19) & IDPROME[4]) ); OUT_DATA[7] = LCELL((ADD_FLAG41 & CTRLZERO[7]) # (ADD_FLAG42 & CTRLONE[7]) # (ADD_FLAG44 & HEART_CTRL[7]) # (ADD_FLAG48 & ZERO & IDPROM0[5]) # (ADD_FLAG48 & FOUR & IDPROM1[5]) # (ADD_FLAG48 & EIGHT & IDPROM2[5]) # (ADD_FLAG48 & CEE & IDPROM3[5]) # (ADD_FLAG48 & 10EE & IDPROM4[5]) # (ADD_FLAG48 & 14EE & IDPROM5[5]) # (ADD_FLAG48 & 18EE & IDPROM6[5]) # (ADD_FLAG48 & !( !A2 # !A3 # !A4 # A5 # !ZERO_6_19) & IDPROM7[5]) # (ADD_FLAG48 & !( A2 # A3 # A4 # !A5 # !ZERO_6_19) & IDPROM8[5]) # (ADD_FLAG48 & !( !A2 # A3 # A4 # !A5# !ZERO_6_19) & IDPROM9[5]) # (ADD_FLAG48 & !( A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMA[5]) # (ADD_FLAG48 & !( !A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMB[5]) # (ADD_FLAG48 & !( A2 # A3 # !A4 # !A5 # !ZERO_6_19) & IDPROMC[5]) # (ADD_FLAG48 & !( !A2 # A3 # !A4 # !A5# !ZERO_6_19) & IDPROMD[5]) # (ADD_FLAG48 & !( A2 # !A3 # !A4 # !A5 # !ZERO_6_19) & IDPROME[5]) ); OUT_DATA[8] = LCELL((ADD_FLAG41 & CTRLZERO[8]) # (ADD_FLAG42 & CTRLONE[8]) # (ADD_FLAG44 & HEART_CTRL[8]) # (ADD_FLAG48 & ZERO & IDPROM0[6]) # (ADD_FLAG48 & FOUR & IDPROM1[6]) # (ADD_FLAG48 & EIGHT & IDPROM2[6]) # (ADD_FLAG48 & CEE & IDPROM3[6]) # (ADD_FLAG48 & 10EE & IDPROM4[6]) # (ADD_FLAG48 & 14EE & IDPROM5[6]) # (ADD_FLAG48 & 18EE & IDPROM6[6]) # (ADD_FLAG48 & !( !A2 # !A3 # !A4 # A5 # !ZERO_6_19) & IDPROM7[6]) # (ADD_FLAG48 & !( A2 # A3 # A4 # !A5 # !ZERO_6_19) & IDPROM8[6]) # (ADD_FLAG48 & !( !A2 # A3 # A4 # !A5# !ZERO_6_19) & IDPROM9[6]) # (ADD_FLAG48 & !( A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMA[6]) # (ADD_FLAG48 & !( !A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMB[6]) # (ADD_FLAG48 & !( A2 # A3 # !A4 # !A5 # !ZERO_6_19) & IDPROMC[6]) # (ADD_FLAG48 & !( !A2 # A3 # !A4 # !A5# !ZERO_6_19) & IDPROMD[6]) # (ADD_FLAG48 & !( A2 # !A3 # !A4 # !A5 # !ZERO_6_19) & IDPROME[6]) ); OUT_DATA[9] = LCELL((ADD_FLAG41 & CTRLZERO[9]) # (ADD_FLAG42 & CTRLONE[9]) # (ADD_FLAG44 & HEART_CTRL[9]) # (ADD_FLAG48 & ZERO & IDPROM0[7]) # (ADD_FLAG48 & FOUR & IDPROM1[7]) # (ADD_FLAG48 & EIGHT & IDPROM2[7]) # (ADD_FLAG48 & CEE & IDPROM3[7]) # (ADD_FLAG48 & 10EE & IDPROM4[7]) # (ADD_FLAG48 & 14EE & IDPROM5[7]) # (ADD_FLAG48 & 18EE & IDPROM6[7]) # (ADD_FLAG48 & !( !A2 # !A3 # !A4 # A5 # !ZERO_6_19) & IDPROM7[7]) # (ADD_FLAG48 & !( A2 # A3 # A4 # !A5 # !ZERO_6_19) & IDPROM8[7])# (ADD_FLAG48 & !( !A2 # A3 # A4 # !A5# !ZERO_6_19) & IDPROM9[7]) # (ADD_FLAG48 & !( A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMA[7]) # (ADD_FLAG48 & !( !A2 # !A3 # A4 # !A5 # !ZERO_6_19) & IDPROMB[7]) # (ADD_FLAG48 & !( A2 # A3 # !A4 # !A5 # !ZERO_6_19) & IDPROMC[7]) # (ADD_FLAG48 & !( !A2 # A3 # !A4 # !A5# !ZERO_6_19) & IDPROMD[7]) # (ADD_FLAG48 & !( A2 # !A3 # !A4 # !A5 # !ZERO_6_19) & IDPROME[7]) ); %Finally we can give the data back to the outside world% BUFFZERO.a[] = OUT_HEART[]; BUFFZERO.en = ((ADD_FLAG43 # L1FIFO # ADD_FLAG44) & WRITEPRIME) # (ALFIFO & !WRITEPRIME); HEART_CTRL[] = BUFFZERO.y[]; BUFFONE.a[] = OUT_DATA[]; BUFFONE.en = (ADD_FLAG41 # ADD_FLAG42 # ADD_FLAG44 # ADD_FLAG45 # ADD_FLAG46 # ADD_FLAG48) & !WRITEPRIME; D[] = BUFFONE.y[]; %Define the clk signals for the internal registers.% CTRLZERO[9..1].clk = !TAP2; CTRLZERO[9..1].ena = LCELL(ADD_FLAG41 & WRITEPRIME); CTRLONE[9..1].clk = !TAP2; CTRLONE[9..1].ena = LCELL(ADD_FLAG42 & WRITEPRIME); MASKEM[5..0].clk = !TAP2; MASKEM[5..0].ena = ADD_FLAG45 & WRITEPRIME; MASKHAD[5..0].clk = !TAP2; MASKHAD[5..0].ena = ADD_FLAG46 & WRITEPRIME; %Define the register for RESET.% CTRLZERO0.clk = !TAP2; CTRLZERO0.ena = LCELL(ADD_FLAG41 & WRITEPRIME); CTRLZERO0.clrn = !/DS; %Define the register for the L1 Accept fake signal.% CTRLONE0.clk = !TAP1; CTRLONE0.ena = ADD_FLAG42 & WRITEPRIME; CTRLONE0.clrn = !/DS; %Define how to reset the strobe registers.% STRB[].clk = !TAP2; STRB[].ena = ALFIFO # ((L1FIFO # ADD_FLAG43) & WRITEPRIME); STRB[].clrn = !/DS; %Define the Lights% LIGHT0 = CTRLZERO1; LIGHT1 = LCELL(!CTRLZERO1); LIGHT2 = /ERROR; %Start to define the logic for controlling the board...why we are here!!!% /VME_ERROR = VCC; /P2_ERR = /ERROR; FTOW_EN = CTRLZERO3; TRACK_SRC = CTRLZERO4; /TRIN_REG_OC = CTRLZERO1 & (ADD_FLAG2 # ADD_FLAG3); /MLU_TRACK_EN = CTRLZERO1 & !CTRLZERO6 & !ADD_FLAG3; TR_DIAG_REG_CLK = ADD_FLAG0 & !TAP2; /TR_DIAG_REG_OC = CTRLZERO4; /TR_ADDR_BUFF = !(CTRLZERO1 & (ADD_FLAG2 # ADD_FLAG3)); /TR_LOOP_DATA_BUFF = !((CTRLZERO1 & ADD_FLAG2) # ADD_FLAG1); /TR_DATA_BUFF = !((CTRLZERO1 # !WRITEPRIME) & ADD_FLAG3); /MLU_TRACK_WE = LCELL(!CTRLZERO1) # CTRLZERO7 # !(WRITEPRIME & ADD_FLAG3) # !(!TAP1 & TAP3); /TRANS_DIR = WRITEPRIME; TOW_EM_CLK[2..0] = CTRLZERO1 & ADD_FLAG[6..4] & !TAP2; TOW_HAD_CLK[2..0] = CTRLZERO1 & ADD_FLAG[9..7] & !TAP2; TOW_HAD_EM_SEL = CTRLONE7; TOW_EM_MASK[5..0] = MASKEM[5..0]; TOW_HAD_MASK[5..0] = MASKHAD[5..0]; TOW_VME_SEL0 = A2; TOW_VME_SEL[2..1] = A[6..5]; /TOW_ENA = LCELL(!CTRLZERO1); TOW_READ_SEL[2] = CTRLZERO1 & !/DS & LCELL(ADD_FLAG[12] # ADD_FLAG[15] # ADD_FLAG[18] # ADD_FLAG[21]); TOW_READ_SEL[1] = CTRLZERO1 & !/DS & LCELL(ADD_FLAG[11] # ADD_FLAG[14] # ADD_FLAG[17] # ADD_FLAG[20]); TOW_READ_SEL[0] = CTRLZERO1 & !/DS & LCELL(ADD_FLAG[10] # ADD_FLAG[13] # ADD_FLAG[16] # ADD_FLAG[19]); TOW_ENER_GRAN = CTRLONE8; /AL_FIFO_OE = CTRLZERO1 & (!CTRLZERO6 # ADD_FLAG22 # ADD_FLAG23 # ADD_FLAG24) & !(ALFIFO # ADD_FLAG49 # ADD_FLAG50 # ADD_FLAG51); /FIFO_RESET = (!(CTRLZERO0 & TAP4) # !CTRLZERO1) & (CTRLZERO1 # /P2_HALT # /P2_RESET); /MLU_ADDR_TT[2..0] = !(CTRLZERO1 & (ADD_FLAG[24..22] # ADD_FLAG[27..25])); /MLU_TT_WE[2..0] = LCELL(!CTRLZERO1) # (CTRLZERO7 # L1FIFO) # !(WRITEPRIME & ADD_FLAG[24..22]) # !(!TAP1 & TAP3); /MLU_TT_OE = CTRLZERO1 & !(CTRLZERO6 # L1FIFO # ALFIFO # ADD_FLAG49 # ADD_FLAG50 # ADD_FLAG51 # ADD_FLAG22 # ADD_FLAG23 # ADD_FLAG24); /MLU_DATA_TT[2..0] = !(CTRLZERO1 & (ADD_FLAG[24..22] # ADD_FLAG[51..49] # ADD_FLAG[54..52])); L2_WRITE_ADDR[1..0] = (!CTRLZERO1 & !L1BA[1..0]) # (CTRLZERO1 & CTRLONE[2..1]); L2_READ_ADDR[1..0] = A[21..20]; /DAQ_READ_EN[2..0] = !ADD_FLAG[30..28] # TAP1; /CSUM_OE = CTRLZERO1 & !((!WRITEPRIME & ADD_FLAG31) & !ADD_FLAG32 & !ADD_FLAG33); /CSUM_DATA_OE = (!CTRLZERO1 & (WRITEPRIME # TAP1)) # !(ADD_FLAG31 # ADD_FLAG32 # ADD_FLAG33); CMUX_REG_CLK = LCELL(!CTRLZERO1) # (WRITEPRIME & ADD_FLAG31 & !(TAP2 # !TAP4)); CMUX_VME_CLK = CTRLZERO1 & ADD_FLAG32 & !(TAP2 # !TAP4); /CMUX_DATA_READ = LCELL(!CTRLZERO1) # !ADD_FLAG33 # TAP1; /CSUM_BP_OE = !CTRLONE6; ET_THRESH0 = CTRLONE3; ET_THRESH1 = CTRLONE4; /ETSUM_OE = CTRLZERO1 & !(!WRITEPRIME & ADD_FLAG34); /ETSUM_VME_G = (!CTRLZERO1 & (WRITEPRIME # TAP1)) # !ADD_FLAG34; /ETSUM_BP_OC = !CTRLONE5; /BUNCH_READ_EN = !ADD_FLAG47; BUNCH_VME_STROBE = CTRLZERO1 & ADD_FLAG35 & !TAP2; ERROR_ADDR[1..0] = A[3..2]; ERROR_VME_CLK = (ADD_FLAG40 # ADD_FLAG39 # ADD_FLAG38 # ADD_FLAG37) & !TAP2 & WRITEPRIME; /FIFO_REN = LCELL(LCELL(!LCELL(/P2_HALT # CTRLZERO1))) # (CTRLZERO1 & CTRLZERO0); /FIFO_WEN = LCELL(LCELL(!LCELL(/P2_HALT # CTRLZERO1))) # (CTRLZERO1 & CTRLZERO0); /ERROR_WRITE = WRITEPRIME # !(ADD_FLAG40 # ADD_FLAG39 # ADD_FLAG38 # ADD_FLAG37); HEART_WRITE = ADD_FLAG44 & WRITEPRIME & !TAP2; /HEART_READ = !(ADD_FLAG44 & !WRITEPRIME); /HEART_RESET = (!CTRLZERO0 # !CTRLZERO1) & (CTRLZERO1 # /P2_HALT # /P2_RESET); HEART_STEP = CTRLZERO1 & (WRITEPRIME # (ALFIFO & !WRITEPRIME)) & !TAP2 & !TAP0 & (ADD_FLAG43 # ALFIFO # L1FIFO # ADD_FLAG34); /HEART_L1A = LCELL(!CTRLZERO1) # !(CTRLONE0 & TAP4); HEART_RUN_HALT = LCELL(!CTRLZERO1); HEART_CLK_SRC = CTRLZERO2; AUX_CTRL[1..0] = CTRLZERO[9..8]; AUX_CTRL[2] = CTRLONE[9]; ACK_FF = !/DS; ACK_FF.clrn = !/DS; ACK_FF.clk = !TAP4; ACK_FF.ena = !/MODSEL; /ACK = !ACK_FF; END;