• Updated: $Date: 2002/06/17 21:53:29 $ (UTC)

• Firmware desiderata for SVT GhostBuster board

• Ghost-Removal program

• Compute beam subtraction internally with 8-bit multiply; use FRAM for sine/cosine table; double-buffer the table of 12 numbers; subtract the beam from each track as it comes in (as now)

• 10-bit by 10-bit multiply (including signs) uses 3% of GB logic, can run at 78 MHz

• Prefilter tracks on pt, chisq, quality

• Memory = 288 tracks * (147 bits + "figure of merit"); stores track with best FOM (or 0 for no track)

• FIFO = 9 bits wide, up to 288 deep; stores list of unique track IDs for current event

• On RECOVER, zero the memory (slow)

• When a track comes in, see if its memory location is zero; if so, write ID to FIFO

• Better of (existing track, new track) is stored in memory

• At end of event, read list of IDs from FIFO; for each ID, output corresponding track, and then zero the memory for next event

• Limit on total number of SVT tracks?

• Diagnostic program

• Capture cable data into VME buffer

• Using on-chip RAM, can fit 1K words per buffer

• if overflows, write actual word count, actual EE word

• Absorb functionality of XTRPemu + XTRP BC check + XTRP track list diagnostic readout

• upon L1A: reset timing counter, write L1A to FIFO

• 16-bit timing counters go to 2.2 msec, should be enough!

• option to fake L1A via VME

• count L1A/buffer since VME clear / since RECOVER

• count sync errors since VME clear / since RECOVER

• Use internal Altera FIFO to hold SVT input data (read from Cypress FIFO), so that FIFO control logic is simple

• State machine:

• initial state: wait for L1A

• then read L1A, latch time, zero svt word count, wait for (a) svt fifo nonempty, (b) timeout, or (c) "skip svt" mode enabled

• latch time

• read svt fifo until EE seen

• check sync

• latch time, write EE