SVT Hit Finder Board

This page contains a collection of technical information about the SVT Hit Finder board that has not yet been integrated into the official Hit Finder page.

To-do list as of 2002-10-06

Hot, new firmware index straight out of CVS

How to compile the firmware

We won first place for a University PCB design in MGC's Technology Leadership contest!

Status of assembled boards

List of known firmware bugs

Selected events in timeline of Hit Finder prototyping/production process

Stable draft (1999-07-04) of Hit Finder specification (PDF)

X-rays of BGAs on re-worked boards

Production bill of materials (also PDF, applix, excel); prototype parts list and bill of materials

Table giving net name and location (inches, from top left corner) of each pin on PCB

Table of component type vs reference number

Ray's splitter rack diagram.

Production ``signoff'' talk at DAQ meeting 1999-07-22

Photos, screen shots, etc.

Production board layout (PDF) (and prototype)

Differences between prototype and production PCB designs

To-do list for pre-production design.

Altera project files for Hit Finder components

Boot chip (EPF10K50VBC356-2)
- boot.tdf
  Top-level Boot program
- vme_interface.tdf
  DIRAC/PreFRED/Cratesum VME chip squeezed into a subroutine
- bootvmedecoder.tdf
  Segments VME address space into (Boot chip, flash RAM, rest of board) and defines VME addresses within Boot chip
- hfcontrollogic.tdf
  Sets timing of VME DTACK and on-board VME control signals
- boot.acf
  Project assignments (e.g. I/O pins)
Data alignment (DAD) chip (EPF10K30AQC240-1)
- dad.tdf
  Complete program source
- dad.acf
  Project assignments (e.g. I/O pins)
Clustering engine (HitMan) chip (EPF10K50VBC356-2)
- hitman.tdf
  Top-level HitMan program
- hmready.tdf
  Interfaces to svxdecode
- svxdecode.tdf
  State machine to parse SVX raw data stream, to flag errors, and to expand strip indices from seven bits to ten using chip IDs
- hmaim.tdf
  Subtracts channel-dependent pedestals and applies chip-dependent thresholds
- hmfire.tdf
  Clusters adjacent strips; applies charge cut; computes centroids quantized as 1/16 strip
- hmvmedecode.tdf
  Defines VME address space for HitMan chip, ISPY memory, cluster RAM, and FIFO write
- vmechipidbus.tdf
  Registers and multiplexers to hold and to access expected sequence of chip ID words
- hitman.acf
  Project assignments (e.g. I/O pins)
Merger chip (EPM7512AEQC208-7)
- merge.tdf
  Top-level Merger program
- fifologic.tdf
  Enables/disables FIFOs; interfaces to choose_fifo
- choose_fifo.tdf
  Decides which FIFO to read next clock cycle
- mergevmedecode.tdf
  Defines VME address space for Merger chip and FIFO read
- merge.acf
  Project assignments (e.g. I/O pins)
Output processor (MOP) chip (EPF10K50VBC356-2)
- mop.tdf
  Top-level MOP program
- outprocessor.tdf
  Pipeline to look up barrel/layer number from stream index and to compute error bits and end-of-event word
- mopvmedecode.tdf
  Defines VME address space for MOP chip, OSPY memory, and ``ID PROM'' DIP switch bank
- mop.acf
  Project assignments (e.g. I/O pins)

Schematics (for prototype)

Sheet 01 - Hit Finder Board (PDF)
Sheet 02 - Power (PDF)
Sheet 03 - VME Interface (PDF)
Sheet 04 - VME P0 Bus (PDF)
Sheet 05 - VME P1 Bus (PDF)
Sheet 06 - VME P2 Bus (PDF)
Sheet 07 - Control (PDF)
Sheet 08 - Boot Chip (PDF)
Sheet 09 - Custom P3 Bus (PDF)
Sheet 10 - Data Alignment (PDF)
Sheet 11 - DAD Chip (PDF)
Sheet 12 - Hit Processing (PDF)
Sheet 13 - Hit Squad (PDF)
Sheet 14 - HitMan Chip (PDF)
Sheet 15 - Hit Merging (PDF)
Sheet 16 - Merger Chip (PDF)
Sheet 17 - MOP Chip (PDF)
Sheet 18 - OSPY (PDF)
Sheet 19 - Front Panel (PDF)
Sheet 20 - Front Panel Connector (PDF)

Selected component data sheets

Flash RAM: Intel DA28F320J5-100 (local copy)
LVDS driver: National DS90C031TM (local copy)
LVDS receiver: National DS90C032TM (local copy)
Cluster lookup (asynchronous SRAM): Samsung KM681002AJ-12 (local copy)
Spy buffer memory (synchronous SRAM): Motorola MCM69F618CTQ9 (local copy)
HitMan output FIFO: Cypress CY7C4245-10ASC (local copy)
Boot, HitMan, MOP: Altera Flex EPF10K50VBC356-2
DAD: Altera Flex EPF10K30AQC240-1
Merger: Altera Max EPM7512AEQC208-7
Header for HP logic analyzer: 3M 2520-6003
ABTE bus transceiver: TI SN74ABTE16245DL (local copy)
Open-collector driver: TI SN74BCT760DW (local copy)
Fast TTL NAND gate: TI SN74AS00 (local copy)
CMOS NAND gate: Philips 74HCT00D (local copy)
CMOS AND gate: Philips 74HCT08D (local copy)
CMOS one-shot (keeps LEDs on): Philips 74HCT123D (local copy)
CMOS buffer (slows down high-fan-out signals): Philips 74HCT244D (local copy)
Tapped delay line (10 taps x 40 ns) (VME timing): Data Delay Devices DDU7C-400 (local copy)
Delay line: Data Delay Devices MDU-38F-10, -50 (local only)
52-pin connector (cluster data): KEL 8822E-052-171H (local only)
EPSON 30 MHz half-size oscillator: DigiKey P/N SE1822-ND (local only)
Front-panel LEDs: ELMA (USA partner of Mentor) 90-1801-2731 (R/Y), 90-1801-8231 (R/G), 90-1882-2781 (G/Y/R): FAX page 1, page 2, page 3
Backplane connectors: ERNI 064785, 064179, 064784 (local copy)
Altera configuration devices (local copy)
Configuring Altera 10K/20K devices (local copy)

Links to related projects

Fiber Interface Board (FIB)
VME Readout Buffer (VRB)
VRB Transition Module (VTM-II)

Obvious omissions

Brief HTML overview of board functionality
Brief HTML overview of each major component
Simulation output
Table of VME addresses for quick reference
Software for operating the board
Performance of clustering algorithm on Run I and simulated Run II data
Update technical data from prototype to production

Cast of characters:

Jeff Berryhill and Ray Culbertson created the conceptual design of the Hit Finder board. Ray designed the clustering algorithms. Jeff did nearly all of the Altera coding and made a first-draft schematic diagram and component list. Harold Sanders and Mircea Bogdan designed and coded, respectively, the Data Alignment Device. Mircea Bogdan designed the PCB, including the award-winning layout and routing. Bill Ashmanskas stood on the shoulders of Jeff, Ray, Mircea, and Harold, to collect the pieces into a working board.

Henry Frisch, Harold Sanders, and Mel Shochet have taught generations of students, postdocs, and engineers how to do these things!

Last updated on $Date: 2003/04/29 01:25:01 $ (UTC)