Schematics of the 500MHz ADC board - Prototype
-
B2664_1.pdf : Top level
diagram;
- B2664_2.pdf : ADC
Channel_j - four identical channels per board;
-
B2664_3.pdf : Front
Panel Digital Input;
-
B2664_4.pdf : Front
Panel Auxiliary I/O;
- B2664_5.pdf : G-Link
Interface;
- B2664_7.pdf : FPGA
Block;
- B2664_8.pdf : VME
Interface;
- B2664_9.pdf : P1
Connectors
- B2664_11.pdf : P2
Connector;
- B2664_12.pdf : Power
block.
For questions regarding this page contact
Mircea Bogdan.
bogdan@edg.uchicago.edu
Revised: Oct. 2009