Sample behavioral waveforms for design file pll2.vhd

The following waveforms show the behavior of altpll megafunction for the chosen set of parameters in design pll2.vhd. The design pll2.vhd has Stratix II AUTO pll configured in NO_COMPENSATION mode The primary clock input to the PLL is INCLK0, with clock period 8000 ps.

Fig. 1 : Wave showing NO_COMPENSATION mode operation.