FTK Data Processing Rear Transition Module
Schematics (#2808_1,...,24 Rev.A)
- 2808_Sheet_1.pdf : Top Level
- 2808_Sheet_2.pdf : VME Interface
- 2808_Sheet_3.pdf : VME RP2 Connector
- 2808_Sheet_4.pdf : RP3 Data I/O Connector
- 2808_Sheet_5.pdf : RP3 Input Buffer
- 2808_Sheet_6.pdf : RP3 Output Buffer
- 2808_Sheet_7.pdf : VME RP0 Connector
- 2808_Sheet_8.pdf : Power Block - General
- 2808_Sheet_9_1.pdf, 2808_Sheet_9_2.pdf, 2808_Sheet_9_3.pdf ,2808_Sheet_9_4.pdf : Power Block - 1 x 24A (4 identical blocks in the Module)
- 2808_Sheet_10_1.pdf, 2808_Sheet_10_2.pdf, 2808_Sheet_10_3.pdf : Power Block - 2 x 12A (3 identical blocks in the Module)
- 2808_Sheet_11.pdf : Power Block - 1 x 12A
- 2808_Sheet_12.pdf : Input Block
- 2808_Sheet_13.pdf : Input FPGA1
- 2808_Sheet_14.pdf : Decoupling Block for Input FPGA1
- 2808_Sheet_15.pdf : Input FPGA2
- 2808_Sheet_16.pdf : Decoupling Block for Input FPGA2
- 2808_Sheet_17.pdf : SFP Block.
- 2808_Sheet_18_1.pdf, 2808_Sheet_18_2.pdf : QSFP Block (2 identical blocks in the Module)
- 2808_Sheet_19.pdf : Processor Block
- 2808_Sheet_20_1.pdf, 2808_Sheet_20_2.pdf, 2808_Sheet_20_3.pdf, 2808_Sheet_20_4.pdf : Processor FPGA (4 identical blocks in the Module)
- 2808_Sheet_21_1.pdf, 2808_Sheet_21_2.pdf, 2808_Sheet_21_3.pdf ,2808_Sheet_21_4.pdf: RAM Block (4 identical blocks in the Module)
- 2808_Sheet_22_1.pdf, 2808_Sheet_22_2.pdf, 2808_Sheet_22_3.pdf ,2808_Sheet_22_4.pdf: Decoupling Block for ProcessorFPGA (4 identical blocks in the Module)
- 2808_Sheet_23.pdf : Termination Block
- 2808_Sheet_24.pdf : Clock Generation Block.
2787.pdf: P3 Connector Tester
For questions regarding this page contact
Mircea Bogdan.
bogdan@edg.uchicago.edu
Revised: Sept. 2013