Schematics of the Pulsar board
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sheet1.pdf : Top level diagram
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sheet2.pdf : Logic_ch_0
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sheet3.pdf : Mezzanine Card
1
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sheet4.pdf : Mezzanine Card
2
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sheet5.pdf : Logic_ch_1
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sheet6.pdf : Mezzanine Card
3
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sheet7.pdf : VME Interface
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sheet8.pdf : P 1
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sheet9.pdf : P0
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sheet10.pdf : VME Chip
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sheet11.pdf : P2
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sheet12.pdf : Mezzanine Card
4
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sheet13.pdf : Level 1 Inputs
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sheet14.pdf : P3
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sheet15.pdf : Control
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sheet16.pdf : Level 1 Out
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sheet17.pdf : TS I/O
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sheet18.pdf : Power
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sheet19.pdf : SVT/XTRP Out
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sheet20.pdf : Clocks
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sheet21.pdf : SVT/XTRP In
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sheet22.pdf : SVT/XTRP FIFO
0
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sheet23.pdf : SVT/XTRP FIFO
1
-
sheet24.pdf : SVT/XTRP FIFO
2
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sheet25.pdf : JTAG Chain
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shett1_25.pdf : The whole
thing.
For questions regarding this page contact Mircea Bogdan.
bogdan@frodo.uchicago.edu
Revised: August 13, 1999