SVT Workshop
October 27-28, 1998
U. of Chicago
The Workshop:
The workshop is an opportunity to for the collaboration to
participate in the discussions of SVT issues at this crucial stage,
shortly before board designs are finalized.
It will be an opportunity for people to understand the capabilities of the
SVT. It is also a chance to contribute to some final decisions
concerning the SVT design. The issues include some hardware choices,
error handling, online software, and designing AM track patterns.
Some sessions will include proposals for solutions to design questions
and, potentially, a decision to except the proposal as a new baseline.
Agenda:
All meetings are in RI-180 (Enrico Fermi and James Franck Research
Institutes, 5640 S. Ellis Ave, Room 180)
Tuesday October 27
9:00-11:00 Review of boards:
Overview and SPY system, Stefano, 15min
HF, Bill, 15min
Merger, Anna Maria, 5min
XFF, Stefano, 5min
AMS, Xin, 10min
AM, Stefano, 15min
HB, Stefano, 10min
TF, Tsuyoshi, 15min
Explain the purpose and range of capabilities (such as
different modes of operation and max clock speed) of each
of the boards so everyone is familiar with the terminology
and some details of what the boards can do.
11:00-12:00 Schedule: Luciano with Henry and Mel
Status of boards and testing - propose new testing and
production schedule
12:00- 1:00 Lunch
1:00- 1:30 Alignment: Giovanni for William Trischuk
Review of the plan for mechanical alignment and confirmation
that it is adequate
1:30- 3:30 Vertical Slice Test: Thomas Speer/Stefano/Ray
Proposal for location and details of a vertical slice test
including hardware needs (SVT workstation?), individual and
integrated online software. Conversion of online software to
it's final form.
3:30- 4:30 Error Handling: Luciano
Proposal for the final error handling scheme. Description of
registers on each board. Where will CDF_ERROR be pulled?
What is the plan for the G-link error?
Wednesday October 28
9:00- 9:45 Proposal of a pattern set for the Associative Memory: Giovanni
Proposal for a nominal set of patterns to loaded in the AM:
4 out of 5, barrel crossers, superstrip size, pt cuts, permutations.
9:45-10:30 Track Fitter details: Proposal for a final hardware
configuration - Tsuyoshi
Proposal of a final hardware configuration - the talk should
cover the extent of the possible ways to use the the hardware.
10:30-12:00 Discussion
12:00- 1:00 Lunch
1:00- 3:00 SVT workstation: Xin/Bill/Stefano
Proposal for the form of the machine that controls the SVT VME
bus, holds and loads the SVT database, serves as the
communication link between run control and the SVT, reads out,
evaluates and stores SPY buffer data. What is the protocol for
talking to Run Control, reporting errors? What operations are
done in what priority? What operations are done on the SPY
buffers and how often? Also a proposal for the general plan
for downloading constants - what is on board/MVME FRAM/
on workstation disk/calculated(?). Since it is too early to
choose an actual platform and database, this will necessarily
be more general and the proposal may be a schedule and an assignment
of responsibilities.
3:00-4:00 Issues of standardization: Stefano/Ray
Discussion of the standardization (or lack of same) of the front
panel, the VME interface, chips, details and the look of
software, and documentation in general.
Accommodations/Registration
The workshop will be held at the University of Chicago in Hyde Park.
Click here for driving directions to the University.
Please send mail to Ray
and let us know you are coming so we know how much coffee to order.
We expect most people will stay at FNAL and commute, but if you would
like to stay in Hyde Park, or have any other questions,
send mail to Ray.
The SVT Workshop is brought to you by:
