Schematics of the 500MHz ADC board
-
B2664_1B.pdf : Top level
diagram;
- ADC
Channel_j - four identical channels per board:
- B2664_2B_LEMO.pdf : ADC
Channel_j - Single Ended Input Configuration;
- B2664_2Bdiff.pdf : ADC
Channel_j - Differentiol Input Configuration;
-
B2664_3B.pdf : Front
Panel Digital Input;
-
B2664_4B.pdf : Front
Panel Auxiliary I/O;
- B2664_5B.pdf : G-Link
Interface;
- B2664_7B.pdf : FPGA
Block;
- B2664_8B.pdf : VME
Interface;
- B2664_9B.pdf : P1
Connectors
- B2664_11B.pdf : P2
Connector;
- B2664_12B.pdf : Power
block.
For questions regarding this page contact
Mircea Bogdan.
bogdan@edg.uchicago.edu
Revised: June 2024