Clock Distribution and Trigger (CDT) Processor Module for KOTO
Schematics - Board
in pdf format.
Layout - Board fabrication
and assembly documentation.
CDT FPGA_Design: CDT_Module_4.zip This Firmware has a constant Fan-Out Delay of ~10ns.
CDT FPGA_Design: CDT_Module_5.zip This Firmware has a adjustable Fan-Out Delay between 11ns and 33ns, in steps of 4ns.
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Updated: December 2016