Level 2 Magical Mystery Board
This page contains documents, technical data, etc., about the
CDF Level 2 Magical Mystery Board that will sink Magic Bus data to an
SVT cable for diagnostic/teststand readout.
Preliminary specification
Slides from 2001-10-18 trigger hardware meeting:
slide 1,
slide 2,
slide 3
Bill's MMB project logbook
Schematics:
top,
P0,
P2,
P2 buffers,
power,
P3,
P3 buffers,
processor,
SVT output,
SVT input
B-size:
top,
P0,
P2,
P2 buffers,
power,
P3,
P3 buffers,
processor,
SVT output,
SVT input
PDF:
top,
P0,
P2,
P2 buffers,
power,
P3,
P3 buffers,
processor,
SVT output,
SVT input
Layout
Bare boards 2001-12-10
Scope photo
of SVTList board sending to MMB on single-slot Magic Bus.
Trace 1=_DStrobe, 2=Boss, 3=_DDone, 4=BossReq. (2002-03-11.)
Another scope photo,
this time with trace 4=DoneOut.
Last updated on $Date: 2002/03/12 04:50:14 $ (UTC)
