Schematics of the 500MHz ADC board - Prototype


  1. B2664_1.pdf : Top level diagram;
  2. B2664_2.pdf : ADC Channel_j - four identical channels per board;
  3. B2664_3.pdf : Front Panel Digital Input;
  4. B2664_4.pdf : Front Panel Auxiliary I/O;
  5. B2664_5.pdf : G-Link Interface;
  6. B2664_7.pdf : FPGA Block;
  7. B2664_8.pdf : VME Interface;
  8. B2664_9.pdf : P1 Connectors
  9. B2664_11.pdf : P2 Connector;
  10. B2664_12.pdf : Power block.


 
For questions regarding this page contact Mircea Bogdan.
bogdan@edg.uchicago.edu
Revised: Oct. 2009