Schematics (#2928 Rev.A)

1. 2928_Sheet_1.pdf: Top Level
2. 2928_Sheet_2.pdf: Power Block
3. 2928_Sheet_3.pdf Power Input Block
4. 2928_Sheet_4.pdf Power - Main 3.3V/30A Supply
5. 2928_Sheet_5.pdf Power - VCCIO-UIB
6. 2928_Sheet_6.pdf Power - CORE VCC - 1
7. 2928_Sheet_7.pdf Power - CORE VCC -2
8. 2928_Sheet_8_1.pdf - Power_VCCERAM, 2928_Sheet_8_2.pdf - Power_VCCRL, 2928_Sheet_8_4.pdf - Power_VCCT, 2928_Sheet_8_5.pdf - Power_VCCH
9. 2928_Sheet_9.pdf Power VCCM
10. 2928_Sheet_10.pdf Control FPGA - MAX10
11. 2928_Sheet_11.pdf 12A Power Supplies Sense Circuit
12. 2928_Sheet_12.pdf Stratix10Mx FPGA Decoupling Capacitors
13. 2928_Sheet_13_1.pdf - Connector J1, 2928_Sheet_13_2.pdf - Connector J2, 2928_Sheet_13_3.pdf - Connector J3, 2928_Sheet_13_4.pdf - Connector J4
14. 2928_Sheet_14.pdf Connector J1 Power Input Connections
15. 2928_Sheet_15.pdf MAX10/TP Buffers
16. 2928_Sheet_16.pdf MAX10/Stratix10 Buffers
17. 2928_Sheet_17.pdf Clocks
18. 2928_Sheet_18.pdf Clocks I2C Buffers
19. 2928_Sheet_19.pdf Stratix10/TP Buffers
20. 2928_Sheet_20.pdf Main I2C Buffers
21. 2928_Sheet_21_1.pdf Stratix10Mx FPGA Sheet_1 - Local Connections
22. 2928_Sheet_21_2.pdf Stratix10Mx FPGA Sheet_2 - Pin Connections
23. 2928_Sheet_21_3.pdf Stratix10Mx FPGA Sheet_3 - Direct TP Connections
    

Revised: Sept 2019