• EFI/EDG Chicago
• Mircea Bogdan
• Emilien Chapon
• Henry Frisch
• Jean-Francois Genat
• Herve Grabas
• Mary Heintz
• Sam Meehan
• Fukun Tang
• University of Hawaii
• Gary Varner, reviewer
• Argonne National Laboratory
• John Anderson
• Gary Drake
• Steve Ross, reviewer

Wednesday, July 1 at 2pm in RI-290, 5640 S Ellis Ave.

• Micro-channel plate signals, picosecond timing, design's minimum performance
  Henry, Jean-Francois (ppt) (pdf)
• 4-channel chip design. Overview, objectives
  Gary, Jean-Francois (doc) (pdf)
• Architecture
  Jean-Francois, Gary, Emilien
• Building Blocks
  • Sampling cell, input bus
    Herve, Gary (ppt) (pdf)
  (png) (png) (ppt)
  • Digital Library
    Emilien, Mircea (pdf)
• ADC
  • Comparator
    Jean-Francois, Mircea (comp1.bmp) (comp_schematic.bmp)
  (comp5.bmp) (comp6.bmp)
  • Counter, 2GS/s clock
    Emilien (odp) (pdf)
  • Output sequencer
    Sam, Emilien (ppt) (pdf)

Thursday, July 2 at 9:30am in RI-290, 5640 S Ellis Ave.

• ADC
  • 20 GS/s timing generator
    Tang (pdf)
  • Ramp generator
    Tang (pdf)
• I/Os
  Tang, Gary, Jean-Francois
• Floorplan, overall layout
  Jean-Francois, Emilien, Gary, Tang
• Software tools, design kits
  Mary, Tang, Jean-Francois
• Tests, test bench, hardware and software
  Jean-Francois, Tang, Mircea
• Schedule
  
• (txt)
All
• 32-channel version
  All

Target design specifications

(doc)