Schematics of the 500MHz, 16-Channel ADC board - Prototype
-
B2835_1.pdf : Top level
diagram;
- B2835_2.pdf : Digital I/O;
- B2835_3_0.pdf, B2835_3_1.pdf : Analog Input (two identical schematics);
- B2835_4_0.pdf, B2835_4_1.pdf, B2835_4_2.pdf, B2835_4_3.pdf, B2835_4_4.pdf, B2835_4_5.pdf, B2835_4_6.pdf, B2835_4_7.pdf: ADC Channel (eight identical schematics);
- B2835_5.pdf : Power Block;
- B2835_6.pdf : FPGA-1 Block;
- B2835_7_1.pdf, B2835_7_2.pdf: FPGA Decoupling Caps (two identical schematics);
- B2835_8.pdf : VME Interface Block;
- B2835_9.pdf : VME P1 Connector;
- B2835_10.pdf : VME P2 Connector;
- B2835_11.pdf : FPGA-2 Block;
- B2835_12_1.pdf, B2835_12_2.pdf: QSFP Block (two identical schematics);
For questions regarding this page contact
Mircea Bogdan.
bogdan@edg.uchicago.edu
Revised: Oct. 2014