Schematics of the 500MHz, 16-Channel ADC board - Prototype


  1. B3003_Sheet_1.pdf : Top level diagram;
  2. B3003_Sheet_2.pdf : Digital I/O;
  3. B3003_Sheet_3.pdf: : Analog Input;
  4. B3003_Sheet_4_0.pdf: Two ADC Channels - There are eight identical schematics in the module;
  5. B3003_Sheet_5.pdf : Power Block;
  6. B3003_Sheet_6.pdf : FPGA Block;
  7. B3003_Sheet_7.pdf : FPGA Decoupling Caps;
  8. B3003_Sheet_8.pdf : VME Interface Block;
  9. B3003_Sheet_9.pdf : VME P1 Connector;
  10. B3003_Sheet_10.pdf : VME P2 Connector;
  11. B3003_Sheet_11.pdf : Ethernet Block;
  12. B3003_Sheet_12_1.pdf, B3003_Sheet_12_2.pdf: QSFP Block (two identical schematics);
  13. B3003_Sheet_13_0.pdf, B3003_Sheet_13_1.pdf: 15A Power Supply (two identical schematics);
  14. B3003_Sheet_14.pdf : 5A Power Supply;
  15. B3003_Sheet_15.pdf : SFP Block;


 
For questions regarding this page contact Mircea Bogdan.
mbogdan@uchicago.edu
Revised: February 2022